SY100S363

Features:

Max. propagation delay of 900ps
IEE min. of 92mA
Industry standard 100K ECL levels
Extended supply voltage option: VEE = 4.2V to 5.5V
Voltage and temperature compensation for improved noise immunity
Internal 75K? input pull-down resistors
60% faster than Fairchild 300K at lower power
Function and pinout compatible with Fairchild F100K
Available in 24-pin CERPACK and 28-pin PLCC packages




Pinout






Description

The SY100S363 is a dual 8-input multiplexer designed for use in new, high-performance ECL systems. The three Data Select inputs (S0, S1, S2) determine the bits from each of the inputs (An, Bn) that will be passed on through the two outputs. The same bit will be selected from the two groups of 8 inputs. The inputs on SY100S363 has 75K? pull-down resistors.