SY10H606

The SY10H606/100H606 are 6-bit, registered, single supply TTL-to-PECL translators. The SY10H606 feature differential PECL outputs as well as a choice between either a differential PECL clock input or a TTL clock input. The asynchronous master reset control is a PECL level input.

With its differential ECL outputs and TTL inputs, the SY10H606 device is ideally suited for the transmit function of a HPPI bus-type board-to-board interface application. The on-chip registers simplify the task of synchronizing the data between the two boards.

The device is available in either ECL standard: the 10H device is compatible with SY10H606 logic levels, while the 100H device is compatible with 100K logic levels.