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SiE806DF

Features: • N-Channel Vertical DMOS• Macro Model (Subcircuit Model)• Level 3 MOS• Apply for both Linear and Switching Application• Accurate over the −55 to 125°C Temperature Range• Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristic...

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SiE806DF: Features: • N-Channel Vertical DMOS• Macro Model (Subcircuit Model)• Level 3 MOS• Apply for both Linear and Switching Application• Accurate over the −55 to 125°C ...

SiE806DF Data Sheet

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Part Number:
SiE806DF
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5000

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Upload time: 2024/4/25

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Product Details

Description



Features:

• N-Channel Vertical DMOS
• Macro Model (Subcircuit Model)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics




Description

SiE806DF N-Channel 30-V (D-S) MOSFET

The attached spice model of SiE806DF describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0-V to 10-V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage.

A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values of SiE806DF are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device.






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