TMPN3120FE3M

  Main features of the 20 MHz Neuron Chip
     ( In comparison with the TMPN3120E1M and TMPN3120FE3M / U )
    `Increased communication speed
            The maximum transmission speed has been increased two-fold.
            1.25 Mbps 2.5 Mbps
    `Shortened response time
            The amount of time required from I / O input to I / O output hasbeen greatly reduced.
            Maximum speed 7 ms 3~4 ms
    `Increased IO object speed
            The execution time for all objects has been halved.
            Example ) Serial I / O 9600 bps
            Parallel I / O 1.2 µs / byte
    `Development tool support
       The current LonBuilder® and NodeBuilder® development tools can be used to develop applications for the TMPN3120FE3M and TMPN3120FE3U (L.B ver 3.0 or 3.01 is needed). Updated symbol table files for the Neuron Chip firmware areavailable from Echelon. If your application requires a 20 MHz input clock, a utility program available fromEchelon may be used to convert the programmer files.
       *  The conversion utilities can be obtained from the Echelon Web Site at http://www.echelon.com.

  I / O Functions
    `Eleven programmable I / O pins.
    `Two programmable 16-bit timers and counters built in.
    ` 34 different types of I / O functions to handle a wide range of input and output.
    `ROM firmware image containing pre-programmed I / O drivers, greatly simplifying application programs.

Network functions
    `Two CPUs for communication protocol processing built in.
       The communications and application CPUs execute in parallel.
    `Equipped with a built-in LonTalk protocol which supports all seven levels of the OSI reference model with ISO.
    `The ROM firmware image contains a complete network operating system, greatly simplifying application
       programs.
    `Built-in twisted-pair wire transceiver
    `Equipped with communications modes and communication speeds which support various types of external
       transceivers.
       Supports twisted-pair wire, power line, radio ( RF ), infrared, coaxial cables and fiber optics.
    `Communication port transceiver modes and logical addresses stored within the EEPROM.
       Can be amended via the network.

  Other functions
    `Application programs are also stored within the EEPROM.
       Can be updated by downloading over the network.
    `Built-in watch-dog timer.
    `Each chip has a unique ID number.
       Effective during the logical installation of networks.
    `Low electrical consumption mode supported with a sleep mode.
  Reset time
     Prolongs the power-ON reset time for at least 50 ms and keeps the operation stable during that time.
    `High-impedance communication port ( CP0 to CP3 ) when powered down.
       The Communication port pins ( CP0 to CP3 ) attain high impedance when the Neuron Chip is powered down.
       It eliminates the need for an external relay.
    `Built-in low-voltage detection circuit.
       Prevents incorrect operations and writing errors in the EEPROM during drops in power voltage.
       An external LVD must be used to assert reset at power supply voltage below 4.5 V if Neuron Chip is operated
       at 20 MHz.
    `The package is SOP32-P-525-1.27 and LQFP44-P-1010-0.80.

V_SS = 0V, V_SS typ.

OPERATING CONDITIONS

   The Neuron Chip (TMPN3120FE3M and TMPN3120FE3U) provides double the performance of previous Neuron Chips. It supports a response time of 3 to 4 ms across a LONWORKs Network and has double the input / output (I / O) performance of the previous Neuron Chip in terms of both response time and
data transmission speed.

   The Neuron Chip (TMPN3120FE3M and TMPN3120FE3U) features an extra single-chip memory in the form of 2 Kbytes EEPROM, 2 Kbytes SRAM and 16 Kbytes ROM. It is therefore suitable for applications which require complex operations and high speed communication control.

    Neuron Chips have all the built-in communications and control functions required to implement LONWORKS nodes. These nodes may then be easily integrated into highly-reliable distributed intelligent control networks.

    The typical functions for this chip are explained below.