TP8482

The TP8482 3D Mouse Controller is specially designed to control 3D PS/2 mouse device. This single chip can interface five key-switches and six photo-couples direct to 8042. TP8482 can receive command and echo status or data format which are compatible with IBM PS/2 mode mouse and Microsoft 3D PS2 mouse.Key de-bouncing circuit is provided to prevent false entry and improve TP8482 accuracy.In the conventional mouse, a great number of noises are generated when the grid is partially closed or opened. These noises are usually mistaken for movement signals by conventional mouse controller and the cursor of the display screen is thus moved frequently up and down or back and forth.

Features of the TP8482 are:(1)being compatible with 2D & 3D (3/5 keys) mouse mode; (2)including buyer testing mode; (3)auto speed with dynamic resolutions; (4)built-in noise immunity circuit; (5)low power dissipation; (6)clocked by build-in RC oscillating circuit; (7)five key-switches and six photo-couples inputs; (8)both key-press and key-release debounce interval 12 ms; (9)improved ESD protection; (10)built-in auto-reference function.

The absolute maximum ratings of the TP8482 can be summarized as:(1)supply voltage:-0.3 to 5.5V;(2)power dissipation:500mW;(3)storage temperature:-65 to 150;(4)temperature under bias:0 to 70.System first check if it is transmitting data. If TP8482 is transmitting, the system can override the output by forcing CLK to an inactive level prior to the tenth clock. If the transmission of TP8482 beyond the tenth clock ,the system must receive the data.If it is not transmitting or if the system choose to override the output, the system force CLK to an inactive level for a period of not less than 100u sec while preparing for output. When the system is ready to output startbit (0), it allows CLK to go to active level.If request-to-send is detected, TP8482 clocks in 11 bits. Following the tenth clock,TP8482 checks for an active level on the DATA line, and if found, force DATA low,and clock once more.