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Part Number: UPD16750
Description: The PD16750 is a source driver for TFT-LCDs capable of dealing with displays...
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UPD16750
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General Description
UPD16750 General Description
The PD16750 is a source driver for TFT-LCDs capable of dealing with displays with 256-gray scales. Data input is based on digital input configured as 8 bits by 6 dots (2 pixels), which can realize a full-color display of 16,777,216 colors by output of 256 values y -corrected by an internal D/A converter and 8-by-2 external power modules.Because the output dynamic range is as large as VDD2 - 0.2 V to VSS2 + 0.2 V, level inversion operation of the LCD's common electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion, n-line inversion and column line inversion when mounted on a single side, this source driver is equipped with a built-in 8-bit D/A converter circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity.
Assuring a maximum clock frequency of 40 MHz when driving at 3.0 V, this driver is applicable to XGA-standard TFTLCD
panels and SXGA TFT-LCD panels. This driver is applicable to SXGA TFT-LCD panels by input display signal 2
systems (Clock divide).
UPD16750 Maximum Ratings
|
Parameter |
Symbol |
Rating |
Unit |
| Logic Part Supply Voltage |
VDD1 |
0.5 to +4.0 |
V |
| Driver Part Supply Voltage |
VDD2 |
0.5 to +10.0 |
V |
| Logic Part Input Voltage |
V11 |
0.5 to VDD1 + 0.5 |
V |
| Driver Part Input Voltage |
V12 |
0.5 to VDD2 + 0.5 |
V |
| Logic Part Output Voltage |
VO1 |
0.5 to VDD1 + 0.5 |
V |
| Driver Part Output Voltage |
VO2 |
0.5 to VDD2 + 0.5 |
V |
| Operating Ambient Temperature |
TA |
10 to +75 |
°C |
| Storage Temperature |
Tstg |
-55 to +125 |
°C |
Caution If the absolute maximum rating of even one of the above parameters is exceeded even momentarily, the quality of the product may be degraded. Absolute maximum ratings, therefore,specify the values exceeding which the product may be physically damaged. Be sure to use the product within the range of the absolute maximum ratings.
UPD16750 Features
` CMOS level input
` 384 outputs
` Input of 8 bits (gradation data) by 6 dots
` Capable of outputting 256 values by means of 8-by-2 external power modules (16 units) and a D/A converter
` Output dynamic range: VDD2 0.2 V to VSS2 + 0.2 V
` High-speed data transfer: fCLK = 40 MHz (internal data transfer speed when operating at 3.0 V)
` Apply for dot-line inversion, n-line inversion and column line inversion
` Output voltage polarity inversion function (POL)
` Display data inversion function (POL21/22)
` Logic power supply voltage (VDD1) : 3.3 V ± 0.3 V
` Driver power supply voltage (VDD2) : 9.0 V ± 0.5 V
` Low power control function (LPC)
` 384 outputs
` Input of 8 bits (gradation data) by 6 dots
` Capable of outputting 256 values by means of 8-by-2 external power modules (16 units) and a D/A converter
` Output dynamic range: VDD2 0.2 V to VSS2 + 0.2 V
` High-speed data transfer: fCLK = 40 MHz (internal data transfer speed when operating at 3.0 V)
` Apply for dot-line inversion, n-line inversion and column line inversion
` Output voltage polarity inversion function (POL)
` Display data inversion function (POL21/22)
` Logic power supply voltage (VDD1) : 3.3 V ± 0.3 V
` Driver power supply voltage (VDD2) : 9.0 V ± 0.5 V
` Low power control function (LPC)
UPD16750
PDF/DataSheet Download
- Datasheet: UPD16750
- File Size: 193081 KB
- Manufacturer: NEC [NEC]
- Click here to Download
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