Purchase UPD77018, In-stock UPD77018 From SeekIC.
- Table of contents:
UPD77018
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Suppliers
DataSheet
General Description
UPD77018 Maximum Ratings
| Parameters |
Symbol |
Conditions |
Ratings |
Unit |
| Power supply voltage |
VDD |
|
0.5 to +4.6 |
V |
| Input voltage |
VI |
2.7 V VDD 3.6 V |
0.5 to +4.1 |
V |
| Output voltage |
VO |
|
0.5 to +4.6 |
V |
| Storage temperature |
Tstg |
|
65 to +150 |
°C |
| Operating ambient temperature |
TA |
|
40 to +85 |
°C |
UPD77018 Features
FUNCTIONS
Instruction cycle: 30 ns (MIN.)
Operation clock: 33 MHz
External clock: 33, 16.5, 8.25, 4.125 MHz
Crystal: 33 MHz
On-chip PLL to provide higher operation clock than the external clock
Dual load/store
Hardware loop function
Conditional execution
Executes product-sum operation in one instruction cycle
PROGRAMMING
16 bits * 16 bits + 40 bits 40 bits multiply accumulator
8 general registers (40 bits each)
8 ROM/RAM data pointer: each data memory area has 4 registers
10 source interrupts (external: 4, internal: 6)
3 operand instructions (example: R0 = R0 +R1L*R2L)
MEMORY AREAS
Instruction memory area : 64K words * 32 bits
Data memory areas : 64K words * 16 bits * 2 (X memory, Y memory)
CLOCK GENERATOR
Mask option for CLKOUT pin:
Fixed to the low level.
Does not output the internal system clock.
Selectable source clock: external clock input and crystal resonator
[External clock]
On-chip PLL to provide higher operation clock (33 MHz MAX.) than the external clock.
Variable multiple rates (1, 2, 4, 8) by mask option.
[Crystal resonator]
Oscillation frequency corresponds directly to the system clock frequency (Sure to specify the mask option
frequency multiple as "1").
Instruction cycle: 30 ns (MIN.)
Operation clock: 33 MHz
External clock: 33, 16.5, 8.25, 4.125 MHz
Crystal: 33 MHz
On-chip PLL to provide higher operation clock than the external clock
Dual load/store
Hardware loop function
Conditional execution
Executes product-sum operation in one instruction cycle
PROGRAMMING
16 bits * 16 bits + 40 bits 40 bits multiply accumulator
8 general registers (40 bits each)
8 ROM/RAM data pointer: each data memory area has 4 registers
10 source interrupts (external: 4, internal: 6)
3 operand instructions (example: R0 = R0 +R1L*R2L)
MEMORY AREAS
Instruction memory area : 64K words * 32 bits
Data memory areas : 64K words * 16 bits * 2 (X memory, Y memory)
CLOCK GENERATOR
Mask option for CLKOUT pin:
Fixed to the low level.
Does not output the internal system clock.
Selectable source clock: external clock input and crystal resonator
[External clock]
On-chip PLL to provide higher operation clock (33 MHz MAX.) than the external clock.
Variable multiple rates (1, 2, 4, 8) by mask option.
[Crystal resonator]
Oscillation frequency corresponds directly to the system clock frequency (Sure to specify the mask option
frequency multiple as "1").
UPD77018 Connection Diagram
UPD77018
PDF/DataSheet Download
- Datasheet: UPD77018
- File Size: 434407 KB
- Manufacturer: NEC [NEC]
- Click here to Download
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