UT8CR512K32

Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2. Maximum junction temperature may be increased to +175°C during burn-in and steady-static life.
3. Test per MIL-STD-883, Method 1012.

The UT8CR512K32 is a high-performance CMOS static RAM multi-chip module (MCM), organized as four individual 524,288 words by 8 bit SRAMs with common output enable. Easy memory expansion is provided by active LOW chip enables (EN), an active LOW output enable (G), and three-state drivers. This device has a power-down feature that reduces power consumption by more than 90% when deselected.

Writing to each memory of UT8CR512K32 is accomplished by taking the corresponding chip enable (En) input LOW and write enable (Wn) input LOW. Data on the I/O pins is then written into the location specified on the address pins (A0 through A18). Reading from the device is accomplished by taking the chip enable (En) and output enable (G) LOW while forcing write enable (Wn) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The input/output pins of UT8CR512K32 are placed in a high impedance state when the device is deselected (En HIGH), the outputs are disabled (G HIGH), or during a write operation (En LOW and Wn LOW). Perform 8, 16, 24 or 32 bit accesses by making Wn along with En a common input to any combination of the discrete memory die.