V53C16256H

Features: 256K x 16-bit organization Fast Page Mode for a sustained data rate of 53 MHz.RAS access time: 30, 35, 40, 45, 50, 60 ns Dual CAS Inputs Low power dissipationRead-Modify-Write, RAS-Only Refresh,CAS-Before-RAS RefreshRefresh Interval: 512 cycles/8 msAvailable in 40-pin 400 mil SOJ and 40/...

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SeekIC No. : 004539923 Detail

V53C16256H: Features: 256K x 16-bit organization Fast Page Mode for a sustained data rate of 53 MHz.RAS access time: 30, 35, 40, 45, 50, 60 ns Dual CAS Inputs Low power dissipationRead-Modify-Write, RAS-Only Re...

floor Price/Ceiling Price

Part Number:
V53C16256H
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/27

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Product Details

Description



Features:

 256K x 16-bit organization 
Fast Page Mode for a sustained data rate of 53 MHz. 
 RAS access time: 30, 35, 40, 45, 50, 60 ns 
Dual CAS Inputs 
Low power dissipation
 Read-Modify-Write, RAS-Only Refresh,CAS-Before-RAS Refresh
 Refresh Interval: 512 cycles/8 ms
 Available in 40-pin 400 mil SOJ and 40/44L-pin 400 mil TSOP-II packages 
Single +5V±10% Power Supply 
TTL Interface



Pinout

  Connection Diagram




Specifications

Ambient TemperatureUnder Bias...................................................... 10°C to +80°C
Storage Temperature (plastic)........................................................ 55°C to +125°C
Voltage Relative to VSS ......................................................................1.0 V to +7.0V
Data Output Current ........................................................................................ 50 mA
Power Dissipation.............................................................................................. 1.0 W



Description

The V53C16256H is a 262,144 x 16 bit highperformance CMOS dynamic random access memory. The V53C16256H offers Fast Page mode with dual CAS inputs. An address, CAS and RAS input capacitances are reduced to one quarter when the x4 DRAM is used to construct the same memory density. The V53C16256H has symmetric address and accepts 512 cycle 8ms interval.

All inputs are TTL compatible. Fast Page Mode operation allows random access up to 512 x 16 bits, within a page, with cycle times as short as 19ns.

The V53C16256H is best suited for graphics, and DSP applications.




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