V53C516405A

Features: 4M x 4-bit organization EDO Page Mode for a sustained data rate of 50 MHzRAS access time: 50, 60, 70 ns Low power dissipation Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, Hidden Refresh Refresh Interval: 4096 cycles/64 ms Available in 24/26-pin 300 mil SOJ, and 24/26-pin ...

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SeekIC No. : 004539935 Detail

V53C516405A: Features: 4M x 4-bit organization EDO Page Mode for a sustained data rate of 50 MHzRAS access time: 50, 60, 70 ns Low power dissipation Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, H...

floor Price/Ceiling Price

Part Number:
V53C516405A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/15

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Product Details

Description



Features:

 4M x 4-bit organization 
EDO Page Mode for a sustained data rate of 50 MHz
 RAS access time: 50, 60, 70 ns 
Low power dissipation 
Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, Hidden Refresh 
Refresh Interval: 4096 cycles/64 ms 
Available in 24/26-pin 300 mil SOJ, and 24/26-pin 300 mil TSOP-II 
Single +5 V±10% Power Supply 
TTL Interface



Pinout

  Connection Diagram


Specifications

Operating temperature range ......................................................................0 to 70°C
Storage temperature range ................................................................... -55 to 150°C
Input/output voltage ......................................................... -0.5 to min (VCC+0.5, 7) V
Power supply voltage .................................................................................-1.0V to 7V
Power dissipation ............................................................................................... 1.0 W
Data out current (short circuit) .......................................................................... 50 mA



Description

The V53C516405A is a 4,194,304 x 4 bit highperformance CMOS dynamic random access memory. The V53C516405A offers Page mode operation with Extended Data Output. The V53C516405A has a symmetric address, 12-bit row and 10-bit column.

All inputs are TTL compatible. EDO Page Mode operation allows random access up to 1024 x 4 bits, within a page, with cycle times as short as 20ns.

These features make the V53C516405A ideally suited for a wide variety of high performance computer systems and peripheral applications.




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