V53C8126H

Features: 128K x 8-bit organizationRAS access time: 35, 40, 45, 50 nsFast Page Mode supports sustained I/O data rates up to 40 MHzRead-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh capabilityRefresh Interval • V53C8126H 512 cycles/8 msAvailable in 26/24 pin 300 mil SOJ and 28 pin T...

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SeekIC No. : 004539944 Detail

V53C8126H: Features: 128K x 8-bit organizationRAS access time: 35, 40, 45, 50 nsFast Page Mode supports sustained I/O data rates up to 40 MHzRead-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh capabili...

floor Price/Ceiling Price

Part Number:
V53C8126H
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/29

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Product Details

Description



Features:

 128K x 8-bit organization
 RAS access time: 35, 40, 45, 50 ns
 Fast Page Mode supports sustained I/O data rates up to 40 MHz
 Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh capability
 Refresh Interval
   • V53C8126H 512 cycles/8 ms
 Available in 26/24 pin 300 mil SOJ and 28 pin TSOP package



Pinout

  Connection Diagram




Specifications

Ambient Temperature Under Bias .............................................................. 10°C to +80°C
Storage Temperature (plastic) ................................................................. 55°C to +125°C
Voltage Relative to VSS .............................................................................. 1.0 V to +7.0 V
Data Output Current ..................................................................................................50 mA
Power Dissipation ...................................................................................................... 1.0 W



Description

The V53C8126H is a high speed 131,072 x 8 bit CMOS dynamic random access memory. The V53C8126H offers a combination of features: Fast Page Mode for high data bandwidth, fast usable speed, CMOS standby current.

All inputs and outputs are TTL compatible. Input and output capacitances are significantly lowered to allow increased system performance. Fast Page Mode operation allows random access of up to 256 columns (x8) bits within a row with cycle times as
short as 21 ns. Because of static circuitry, the CAS clock is not in the critical timing path. The flowthrough column address latches allow address pipelining while relaxing many critical system timing requirements for fast usable speed. These features make the V53C8126H ideally suited for graphics, digital signal processing and high performance peripherals.




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