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Part Number: V53C818H

 

 

 

 

Description: The V53C818H is a 524,288 x 16 bit highperformance CMOS dynamic random access memory. The V53C818H off...


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V53C818H General Description


The V53C818H is a 524,288 x 16 bit highperformance CMOS dynamic random access memory. The V53C818H offers Page mode operation with Extended Data Output. An address, CAS and RAS input capacitances are reduced to one half when the 256K x 16 DRAM is used to construct the same memory density. The V53C818H has asymmetric address, 10-bit row and 9-bit column.

All inputs are TTL compatible. EDO Page Mode operation allows random access up to 512 x 16 bits, within a page, with cycle times as short as 15ns. The V53C818H is ideally suited for graphics, digital signal processing and high performance peripherals.

V53C818H Maximum Ratings

Ambient TemperatureUnder Bias................................................................... 10°C to +80°C
Storage Temperature (plastic).................................................................... 55°C to +125 °C
Voltage Relative to VSS ..................................................................................1.0 V to +7.0 V
Data Output Current .................................................................................................... 50 mA
Power Dissipation.......................................................................................................... 1.4 W

V53C818H Features

 512K x 16-bit organization
 EDO Page Mode for a sustained data rate of83 MHz
 RAS access time: 30, 35, 40, 45, 50 ns
 Dual CAS Inputs
 Pin-to-Pin compatible with 256K x 16
 Low power dissipation
 Read-Modify-Write, RAS-Only Refresh,CAS-Before-RAS Refresh
 Refresh Interval: 512 cycles/8 ms
 Available in 40-pin 400 mil SOJ and 40/44L-pin 400 mil TSOP-II packages
 Single +5V±10% Power Supply
 TTL Interface

V53C818H Connection Diagram

V53C818H  Connection Diagram

V53C818H datasheet

V53C818H
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