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V62C2162048L(L)

Features: • Low-power consumption - Active: 65mA ICC at 35ns - Stand-by: 10 mA (CMOS input/output)2 mA (CMOS input/output, L version)• 35/45/55/70/85/100 ns access time• Equal access and cycle time• Single +2.2V to 2.7V Power Supply• Tri-state output• Automatic ...

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SeekIC No. : 004540205 Detail

V62C2162048L(L): Features: • Low-power consumption - Active: 65mA ICC at 35ns - Stand-by: 10 mA (CMOS input/output)2 mA (CMOS input/output, L version)• 35/45/55/70/85/100 ns access time• Equal acce...

V62C2162048L(L) Data Sheet

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Part Number:
V62C2162048L(L)
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Low-power consumption
         - Active: 65mA ICC at 35ns
         - Stand-by: 10 mA (CMOS input/output)
                            2 mA (CMOS input/output, L version)
• 35/45/55/70/85/100 ns access time
• Equal access and cycle time
• Single +2.2V to 2.7V Power Supply
• Tri-state output
• Automatic power-down when deselected
• Multiple center power and ground pins for improved noise immunity
• Individual byte controls for both Read and Write cycles
• Available in 44 pin TSOP II / 48-fpBGA


Pinout

Connection Diagram


Specifications

Parameter
Symbol
Minimum
Maximum
Unit
Voltage on Any Pin Relative to Gnd
Vt
-0.5
+4.6
V
Power Dissipation
PT
-
1.0
W
Storage Temperature (Plastic)
Tstg
-55
+150
0C
Temperature Under Bias
Tbias
-40
+85
0C



Description

The V62C2162048L(L) is a Low Power CMOS Static RAM organized as 131,072 words by 16 bits. Easy memory expansion is provided by an active LOW (CE) and (OE) pin.

This device has an automatic power-down mode feature when deselected. Separate Byte Enable controls (BLE and BHE) allow individual bytes to be accessed. BLE controls the lower bits I/O1 - I/O8. BHE controls the upper bits I/O9 - I/O16.

Writing to these devices is performed by taking Chip Enable (CE) with Write Enable (WE) and Byte Enable (BLE/BHE) LOW.

Reading from the device is performed by taking Chip Enable (CE) with Output Enable (OE) and Byte Enable (BLE/BHE) LOW while Write Enable (WE) is held HIGH.




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