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V62C3162048L(L)

Features: • Low-power consumption -tive: 65mA ICC at 35ns -tand-by: 10 mA (CMOS input/output)2mA(DS input/output, L version)• 35/45/55/70/85/100 ns access time• Equal access and cycle time• Single +2.7V to3.3V Power Supply• Tri-state output• Automatic power-down...

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SeekIC No. : 004540213 Detail

V62C3162048L(L): Features: • Low-power consumption -tive: 65mA ICC at 35ns -tand-by: 10 mA (CMOS input/output)2mA(DS input/output, L version)• 35/45/55/70/85/100 ns access time• Equal access and cy...

V62C3162048L(L) Data Sheet

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Part Number:
V62C3162048L(L)
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Low-power consumption
         -tive: 65mA ICC at 35ns
         -tand-by: 10 mA (CMOS input/output)
                        2 mA(DS input/output, L version)
• 35/45/55/70/85/100 ns access time
• Equal access and cycle time
• Single +2.7V to3.3V Power Supply
• Tri-state output
• Automatic power-down when deselected
• Multiple center power and ground pins for mproved noise immunity
• Individual byte controls for both Read and rite cycles
• Available in 44 pin TSOP II / 48-fpBGA


Pinout

Connection Diagram


Specifications

Parameter
Symbol
Minimum
Maximum
Unit
Voltage on Any Pin Relative to Gnd
Vt
-0.5
+4.6
V
Power Dissipation
PT
-
1.0
W
Storage Temperature (Plastic)
Tstg
-55
+150
0C
Temperature Under Bias
Tbias
-40
+85
0C



Description

The V62C3162048L(L) is a Low Power CMOS Static AM organized as 131,072 words by 16 bits. Easy emory expansion is provided by an active LOW (CE) nd (OE) pin.

This V62C3162048L(L) has an automatic power-down mode feature hen deselected. Separate Byte Enable controls (BLE nd BHE) allow individual bytes to be accessed. BLE ontrols the lower bits I/O1 - I/O8. BHE controls the pper bits I/O9 - I/O16.

Writing to these devices is performed by taking Chip nable (CE) with Write Enable (WE) and Byte Enable BLE/BHE) LOW.

Reading from the device is performed by taking Chip nable (CE) with Output Enable (OE) and Byte Enable BLE/BHE) LOW while Write Enable (WE) is held IGH.




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