VL82C320

The VL82C320 includes the system control and data buffering functions in a 160-lead quad flat pack. The VL82C320 is designed to perform in systems running up to 20 MHz. Built=in page mode operation, two- or four-way interleaving, and fully programmable memory timing allow the PC designer to maximize system performance using commodity DRAMs. The system controller handles systems board refresh directly and also controls the timing of slot bus refresh which its actually performed by the VL82C331 ISA bus controller. The refresh rate is programmable to submultiples of 15 ms. This allows use of low power, slow refresh DRAMs. The device controls all timing in both modes. In all cases, refreshes are staggered to minimize power supply loading and attendant noise on the VDD and ground pins.

What comes next is about the absolute maximum ratings of VL82C320: (1)ambient operating temperature: -10 to +70; (2)storage temperature: -65 to +150; (3)supply voltage to ground: -0.5 to 7.0 V; (4)applied output voltage: -0.5 to VDD+0.3 V; (5)applied input voltage: -0.5 to VDD+0.3 V; (6)power dissipation: 500 mW.

The following is about the DC characteristics of VL82C320 (Ta=0 to +70, VDD=5 V±5%, VSS=0 V): (1)VIL, input low voltage: -0.5 V min and 0.8 V max when TTL level inputs; (2)VIH, input high voltage: -2.0 V min and VDD+0.5 V max when TTL level inputs; (3)VILC, input low voltage: -0.5 V min and 0.8 V max when CMOS level inputs; (4)VIHC, input high voltage: VDD-0.8 V min and VDD+0.5 V max when CMOS level inputs; (5)ILI, input leakage current: -10A min and 10A max; (6)IIL, input leakage current: -500A min and 10A max; (7)IDDSB, static power supply current: 500A max; (8)IDDOP, dynamic power supply current: 4 mA/MHz max; (9)CI, input or I/O capacitance: 10 pF max; (10)CO, output capacitance: 10 pF max.