VM5603

The VM5603 has the following features including (1,7) RLL Code;Data Rates from 10 to 64 Mbits/sec;Differential ECL Encoded Data and Clock;Compatible with Zoned-Density Recording;ProgrammableWritePrecompensation;Programmable Preamble Length Counted Before Decoder Enabled;Designed to Operate with VM5351 Data Separator and VM5711 Reference Clock Generator;Compatible with the AM95C95 Disk Data Controller;Single Supply 5-Volt Operation;Differential ECL Type Encoded Write Data Output;Available in a 28-Lead PLCC Package;The VM5603 Replaces the VM5602.

The primary function of the VM5603 (1 ,7) ENDEC circuit is to encode and decode the Z3 rate (1,7) Run Length Limited (RLL) modulation code used by the disk drive recording channel. In WRITE mode the device receives NRZ write data and a write clock from the drive controller and puts out (1,7) encoded data to be recorded on the disk media. In READ mode the device inputs (1,7) encoded read data and a code rate clock from the drive read channel and outputs NRZ read data and a read clock to the drive controller.The device also provides programmable write precompensation (WPC). This adjusts the encoded write data bit to bit timing to help compensate for fixed head/media induced read time errors (bit shift). An erase function is provided to enable DC erasure during drive testing and formatting.The device is designed to be compatible with the AM95C95 Disk Data Controller IC in SCSI drive interface applications. It is also designed to be ESDI compatible. It is intended to support hard sector formats only.

The Data Clk Generator/Read Initialize block also receives differential ECL level 3F CLOCK, 3F CLOCK N signals from the drive read channel PLL/Data Synchronizer, This input of VM5603 must provide a data rate clock with a 50 } duty cycle. The rising edge of 3F CLOCK must be synchronous with read code clock (RD CD CLK) and meet the timing constraints outlined in the AC characteristics section. The 3F CLOCK input is divided by 3, then output as RD REF CLK.