W6691

W6691 consists of one D channel HDLC controller and two B HDLC controller channel access. The HDLC controller facilitates efficient access to signaling, data and voice services. It provides multiplex/non- mutiplexe 8- bit microprocessor interface. The interface is selected by external MBS selection. In addition, W6691 can be operated in TE, LT-S and LT-T mode programmed by external pin. In TE mode, W6691 provides PCM bus or GCI bus to connect with CODEC. In LT mode, it can used in NT2 application. W6691 also provides various B channel switching function among PCM, GCI and Layer2. It adopts 3.3V process to manufacture. The FIFO size of D channel is 64 byte. The FIFO size of two B channel are 128bytes. Two extended external interrupt is designed for peripheral interrupt saving extra interrupt circuit design. One layer activation indication output can be programmed by microprocessor control or W6691 chip internal control. The DPLL circuit is design in chip to generate the DCL and FSC signal for NT2 application. It can eliminate extra DPLL circuit on board. In order to save a lot of crystal on board, W6691 can provide 7.68MHz OSC signal for other chip needs the clock in TE or NT2 application.