W89C840F

The W89C840F is a highly integrated Ethernet LAN controller for both 100BaseT and 10BaseT Ethernet. It provides a host bus interface complying with the PCI local bus specification revision 2.1, and the MII interface complying with the IEEE802.3u standard for easily implementing an Ethernet LAN adapter. The built-in 2K bytes transmit FIFO and 4K bytes receive FIFO, controlled by the on-chip bus master, are designed for improving network performance and reducing the host bus utilization.

The on-chip DMA controller handles the data transfer between the host memory and the FIFOs. W89C840F data received from network are queued into the receive FIFO and then, directly moved into the host memory through the PCI bus. On the other hand, the transmitted data are fetched from the host memory and directly queued into the transmit FIFO. No extra on-board memory is needed for data buffering during the data transceiving operation.

Many versatile registers, including host bus control registers, direct memory access(DMA) control registers, media access control registers, and signature identification registers, are implemented for system configuring. All of these long words accessible registers perform the status report and the precisely control on the transmit and receive operation. W89C840F also provides an extra channel for the on-line application program to update the on-board expansion ROM device in some specific application environment.