W986432AH

·  3.3V ±0.3V power supply
·  524288 words ¥ 4 banks ¥ 32 bits organization
·  Auto Refresh and Self Refresh
·  CAS latency: 2 and 3
·  Burst Length: 1, 2, 4, 8, and full page
·  Sequential and Interleave burst
·  Burst read, single write operation
·  Byte data controlled by DQM
·  Power-down Mode
·  Auto-precharge and controlled precharge
·  4K refresh cycles/64 mS
·  Interface: LVTTL
·  Packaged in 86-pin TSOP II, 400 mil - 0.50 

W986432AH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words  ¥ 4 banks ¥ 32 bits. Using pipelined architecture and 0.20  mm process technology,W986432AH delivers a data bandwidth of up to 732M bytes per second (-55). For different

application,W986432AH is sorted into four speed grades:-55, -6, -7 and -8.Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM W986432AH internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.

By having a programmable Mode Register,the system can change burst length,latency,interleave or sequential burst to maximize its performance. W986432AH is ideal for main memory in high performance applications.