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WV3EG64M64ETSU-D3

Features: · Double-data-rate architecture· PC2700 @ CL 2.5· Bi-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read Latency 2,2.5 (clock)· Programmable Burst Length (2,4,8)· Programmable Burst type (sequential & interleave)· Edge aligned data output, cent...

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SeekIC No. : 004546966 Detail

WV3EG64M64ETSU-D3: Features: · Double-data-rate architecture· PC2700 @ CL 2.5· Bi-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read Latency 2,2.5 (clock)· Programmable Burst L...

WV3EG64M64ETSU-D3 Data Sheet

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Part Number:
WV3EG64M64ETSU-D3
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

· Double-data-rate architecture
· PC2700 @ CL 2.5
· Bi-directional data strobes (DQS)
· Differential clock inputs (CK & CK#)
· Programmable Read Latency 2,2.5 (clock)
· Programmable Burst Length (2,4,8)
· Programmable Burst type (sequential & interleave)
· Edge aligned data output, center aligned data input.
· Auto and self refresh, (8K/64ms refresh)
· Serial presence detect with EEPROM
· Power supply:
• VCC = VCCQ = +2.5V ±0.2V
· 184 pin DIMM package
• D3 PCB height: 28.58mm (1.125")


Specifications

Parameter Symbol Value Units
Voltage on any pin relative to VSS

Voltage on VCC supply relative to VSS

Voltage on VCCQ supply relative to VSS		 VIN, VOUT

VCC

VCCQ		 -0.5 to 3.6

-1.0 to 3.6

-1.0 to 3.6		 V

V

V
Storage Temperature

Operating Temperature		 TSTG

TA		 -55 to +150

0 to +70

Power Dissipation

Short Circuit Current		 PD

IOS		 8

50		 W

mA


Note: Permanent device damage may occur if 'ABSOLUTE MAXIMUM RATINGS' are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability




Description

The WV3EG64M64ETSU-D3 is a 64Mx64 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM  omponents. The module consists of eight 64Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin  ubstrate.

 Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the WV3EG64M64ETSU-D3 to be useful for a variety of high bandwidth, high performance memory system applications.




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