Features: • 16,384-channel x 16,384-channel non-blocking unidirectional switching.The Backplane and Local inputs and outputs can be combined to form a non-blocking switching matrix with 64 input streams and 64 output streams
• 8,192-channel x 8,192-channel non-blocking Backplane input to Local output stream switch
• 8,192-channel x 8,192-channel non-blocking Local input to Backplane output stream switch
• 8,192-channel x 8,192-channel non-blocking Backplane input to Backplane output switch
• 8,192-channel x 8,192-channel non-blocking Local input to Local output stream switch
• Backplane port accepts 32 input and 32 output ST-BUS streams with fixed data rates of 2.048Mbps, 4.096Mbps, 8.192Mbps or 16.384Mbps
• Local port accepts 32 input and 32 output STBUS streams with fixed data rates of 2.048Mbps, 4.096Mbps, 8.192Mbps or 16.384Mbps
• Exceptional input clock jitter tolerance (17ns)
• Per-stream bit delay for Local and Backplane input streams
• Per-stream advancement for Local and Backplane output streams
• Constant 2-frame throughput delay for frame integrity
• Per-channel high impedance output control for Local and Backplane streams
• Per-channel driven-high output control for Local and Backplane streams
• Per-channel message mode for Local and Backplane output streams
• Connection memory block programming for fast device initialization
• Automatic selection between ST-BUS and GCI-Bus operation
• Non-multiplexed Motorola microprocessor interface
• Conforms to the mandatory requirements of the IEEE-1149.1 (JTAG) standard
• Memory Built-In-Self-Test (BIST), controlled via microprocessor register
• 1.8V core supply voltage
• 3.3V I/O supply voltage
• 5V tolerant inputs, outputs and I/Os
Application• Central Office Switches (Class 5)
• Media Gateways
• Class-independent switches
• Access Concentrators
• Scalable TDM-Based Architectures
• Digital Loop CarriersPinout
Specifications
| |
Parameter |
Symbol |
Min |
Max |
Units |
| 1 |
Core Supply Voltage |
VDD_CORE |
-0.5 |
2.5 |
V |
| 2 |
I/O Supply Voltage |
VDD_IO |
-0.5 |
5.0 |
V |
| 3 |
PLL Supply Voltage |
VDD_PLL |
-0.5 |
2.5 |
V |
| 4 |
Input Voltage (non-5V tolerant inputs) |
VI |
-0.5 |
VDD_IO
+0.5 |
V |
| 5 |
Input Voltage (5V tolerant inputs) |
VI_5V |
-0.5 |
7.0 |
V |
| 6 |
Continuous Current at digital outputs |
Io |
|
15 |
mA |
| 7 |
Package power dissipation |
PD |
|
1.5 |
W |
| 8 |
Storage temperature |
TS |
- 55 |
+125 |
|
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.DescriptionThe ZL50062 and ZL50064 are two different packages of the same device. They have the same functionality except that ZL50064 does not have 16.384MHz output clock and frame pulse (C16o and FP16o) due to package differences. The ZL50062/4 has two data ports, the Backplane and the Local port. The device can operate at four different data rates, 2.048Mbps, 4.096Mbps, 8.192Mbps or 16.384Mbps. All 64 input and 64 output streams must operate at the same data rate.
ZL50062 Data Sheet
