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NESW008BT-B5T2, NESW008BT-TS3, NET+50

Table of contents:
Info of NESW008BT-B5T2
Info of NESW008BT-TS3
Info of NET+50

NESW008BT-B5T2, NESW008BT-TS3, NET+50 Selling Leads, Datasheet

MFG:N/A Package Cooled:06+ D/C:09+

NESW008BT-B5T2, NESW008BT-TS3, NET+50 Picture

NESW008BT-B5T2, NESW008BT-TS3, NET+50 Datasheet download

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Part Number: NESW008BT-B5T2

MFG: N/A

Package Cooled: 06+

D/C: 09+

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NET+50 General Description

The NET+50 is designed as a cost-effective, high-performance 32-bit network attached microprocessor developed especially for high-bandwidth applications in Intelligent Networked Devices. The NET+50 is a member of the award-winning NET+ARM family of system-on-chip solutions for embedded systems. Based on ARM's architecture, it integrated 10/100Base-T Ethernet MAC with an MII interface, a distributed 10-channel linking DMA controller and a memory controller supporting all of the popular memory devices in use today. Combined with the NET+OS networking software and embedded development tools, the NET+50 offers the best and fastest way to network-enable your device.

It has five features. (1) 32-bit, 44 MHz NET+ARM processor. (2) ARM7TDMI processor core. (3) 10/100Base-T ethernet. (4) Extensive GPIO. (5) 8 kB on-chip cache. That are all the main features.

Some hardware design specifications have been concluded into several points as follow. (1) Its core processor would be ARM7TDMI. (2) Its processor / bus speed would be 44/44MHz. (3) Its cache would be 8k mixed D/I cache (von neumann). (4) Its package would be 208-pin BGA 15x15 mm, PQFP. (5) Its cache / RAM block options would be 2k cache / 4k RAM, total of 4 sets. (6) Its UART would be 2 (230Kbps). (7) Its SPI would be 2. (8) Its GPIO would be 24 I/O or 16 I/O or 16 input-only. (9) Its ENI would be 64k shared RAM (slave). (10) Its IEEE1284 would be 4 (host). (11) Its timers would be 2 (27-bit).

And some other specifications about it. (1) The NET+50 requires 2.5V at 114mA max. (2) The NET+50 uses 18.432MHz with external PLL filter components. (3) The NET+50 did not require any series resistor. (4) The NET+50 has two WE# pins. One for dynamic, and one for static memory. And so on. If you have any question or suggestion or want to know more information please contact us for details. Thank you!

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