SLE88CFX4000P, SLED511, SLEM10R-2LF Selling Leads, Datasheet
MFG:infineon Package Cooled:SOP-20 D/C:07+
SLE88CFX4000P, SLED511, SLEM10R-2LF Datasheet download
Part Number: SLE88CFX4000P
MFG: infineon
Package Cooled: SOP-20
D/C: 07+
MFG:infineon Package Cooled:SOP-20 D/C:07+
SLE88CFX4000P, SLED511, SLEM10R-2LF Datasheet download
MFG: infineon
Package Cooled: SOP-20
D/C: 07+
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PDF/DataSheet Download
Datasheet: SLE88CFX4000P
File Size: 213453 KB
Manufacturer: INFINEON [Infineon Technologies AG]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: SLE
File Size: 399277 KB
Manufacturer: ITT Industries
Download : Click here to Download
PDF/DataSheet Download
Datasheet: SLE
File Size: 399277 KB
Manufacturer: ITT Industries
Download : Click here to Download
SLE 88CFX4000P is the first smart card microcontroller on the market in 0.13 micron CMOS technology. In this product family, Infineon Technologies realises increased security and performance while reducing power consumption, and additionally provides a platform for real multi-application and multi-tasking operating systems.
• Dedicated smart card core: pipelined 32-Bit RISC micro-controller in 0.13 µm CMOS technology with Integral Security Concept
• Designed for maximum security and maximum performance at ultra low power consumption
• Instruction set acceleration of Virtual Machine languages (e.g. Java CardTM, MULTOSTM, WPSCTM, ...)
• 4 Gbytes address range controlled by a powerful Memory Management and Protection Unit (MMU)
• Package Concept: application oriented memory partitioning
• Secure hardware controlled execution of applications and application data access
• Controlled access to peripherals
• Hardware Error Correction Code for ROM, RAM and EEPROM
• Efficient Task switch capability
• 80 Kbytes of "hidden" ROM for the Platform Support Layer (PSL) and STS
• 400 Kbytes of EEPROM, software configurable in code/data memory spaces with 4 Kbytes granularity, for application programs and data. Example: 256 Kbytes of code and 144 Kbytes of data or 320 Kbytes of code and 80 Kbytes of data
• 16 Kbytes of RAM for local variables, buffers, and stacks
• 1K and 2K high performance Instruction and Data Cache Memories for instruction fetch and data access
• Internal clock generation Adjustment of internal clock according to available power and required performance:
• Increase internal clock for maximum speed (66 MHz)
• Reduce internal clock for lowest power consumption