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STLC5464, STLC5465B, STLC5466

Table of contents:
Info of STLC5464
Info of STLC5465B
Info of STLC5466

STLC5464, STLC5465B, STLC5466 Selling Leads, Datasheet

MFG:SGS THOMAS Package Cooled:QFP D/C:1000

STLC5464, STLC5465B, STLC5466 Datasheet download

Five Points

Part Number: STLC5464

MFG: SGS THOMAS

Package Cooled: QFP

D/C: 1000

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STLC5464 General Description

The STLC5464 is a Subscriber line interface card controller for Central Office, Central Exchange,NT2 and PBX capable of handling :
- 16 U Interfaces or
- 2 Megabits line interface cards or
- 16 SLICs (Plain Old TelephoneService) or
- Mixed analogue and digital Interfaces (SLICs or U Interfaces) or
- 16 S Interfaces
- Switching Network with centralized processing

STLC5464 Maximum Ratings

Symbol	Parameter	Value	Unit
V_DD	5V Power Supply Voltage	-0.5, 6.5	V
	Input or Output Voltage	-0.5, V_DD + 0.5	V
T_stg	Storage Temperature	-55, +125

STLC5464 Features

.32 TxHDLCs WITH BROADCASTING CAPABILITY AND/OR CSMA/CR FUNCTION WITH AUTOMATIC RESTART IN CASE OF TX FRAMEABORT
.32 RxHDLCs INCLUDING ADDRESS RECOGNITION
.16 COMMAND/INDICATE CHANNELS (4 OR 6-BIT PRIMITIVE)
.16 MONITOR CHANNELS PROCESSED IN ACCORDANCE WITH GCI OR V*
.256 x 256 SWITCHING MATRIX WITHOUT BLOCKING AND WITH TIME SLOT SEQUENCE INTEGRITY AND LOOPBACK PER
BIDIRECTIONALCONNECTION
.DMA CONTROLLER FOR 32 Tx CHANNELS AND 32 Rx CHANNELS
.HDLCs AND DMA CONTROLLER ARE CAPABLE OF HANDLING A MIX OF LAPD, APB,SS7,CASANDPROPRIETARYSIGNALLINGS
.EXTERNAL SHARED MEMORY ACCESS BETWEEN DMA CONTROLLER AND MICROPROCESSOR
.SINGLE MEMORY SHARED BETWEEN n x MULTI-HDLCs AND SINGLE MICROPROCESSOR ALLOWS TO HANDLE n x 32 CHANNELS
.BUSARBITRATION
.INTERFACE FOR VARIOUS 8,16 OR 32 BIT MICROPROCESSORS
.RAM CONTROLLER ALLOWS TO INTERFACE UP TO :
-16 MEGABYTES OF DYNAMIC RAM OR
-1 MEGABYTEOF STATIC RAM
.INTERRUPT CONTROLLER TO STORE AUTOMATICALLY EVENTS IN SHARED MEMORY
.PQFP160PACKAGE

STLC5464 Connection Diagram

STLC5465B General Description

The STLC5465Bis a Subscriberline interfacecard ontroller for Central Office, Central Exchange, T2 and PBX capable of handling :
- 16 U Interfaces or
- 2 Megabits line interface cards or
- 16 SLICs (Plain Old TelephoneService) or
- Mixed analogue and digital Interfaces (SLICs or Interfaces) or
- 16 S Interfaces
- Switching Network with centralized processing

STLC5465B Maximum Ratings

Symbol	Parameter	Value	Unit
V_DD	5V Power Supply Voltage	-0.5, 6.5	V
	Input or Output Voltage	-0.5, V_DD + 0.5	V
T_stg	Storage Temperature	-55, +125

STLC5465B Features

32 TxHDLCs WITH BROADCASTING CAPABILITY ND/OR CSMA/CR FUNCTION WITH UTOMATIC RESTART IN CASE OF TX
FRAMEABORT
32 RxHDLCs INCLUDING ADDRESS RECOGNITION
16 COMMAND/INDICATE CHANNELS (4 OR 6-IT PRIMITIVE)
16 MONITOR CHANNELS PROCESSED IN CCORDANCE WITH GCI OR V*
256 x 256 SWITCHING MATRIX WITHOUT LOCKING AND WITH TIME SLOT SEQUENCE NTEGRITY AND LOOPBACK PER
BIDIRECTIONALCONNECTION
DMA CONTROLLER FOR 32 Tx CHANNELS ND 32 Rx CHANNELS
HDLCs AND DMA CONTROLLER ARE CAPABLE F HANDLING A MIX OF LAPD, LAPB,SS7,CASANDPROPRIETARYSIGNALLINGS
EXTERNAL SHARED MEMORY ACCESS BETWEEN MA CONTROLLER AND MICROPROCESSOR
SINGLE MEMORY SHARED BETWEEN x MULTI-HDLCs AND SINGLE MICROPROCESSOR LLOWS TO HANDLE n x 32
CHANNELS
BUSARBITRATION
INTERFACE FOR VARIOUS 8,16 OR 32 BIT ICROPROCESSORS
RAM CONTROLLER ALLOWS TO INTERFACE P TO :
-16 MEGABYTES OF DYNAMIC RAM OR
-1 MEGABYTEOF STATIC RAM
INTERRUPT CONTROLLER TO STORE UTOMATICALLY EVENTS IN SHARED MORY
PQFP160PACKAGE
BOUNDARY SCAN FOR TEST FACILITY

STLC5465B Connection Diagram

STLC5466 General Description

The STLC5466 is a Subscriber line interface card controller for Central Office, Central Exchange, NT2 and PBX capable of handling:
16 U Interfaces or
2 Megabits line interface cards or
16 SLICs (Plain Old Telephone Service) or
Mixed analogue and digital Interfaces (SLICs or U Interfaces) or
16 S Interfaces
Switching Network with centralized processing.

STLC5466 Maximum Ratings

Symbol	Parameter	Value	Unit
VDD	3.3V Power Supply Voltage	-0.5V to 4V	V
	Input or Output Voltage	-0.5 to VDD + 0.5V	V
	Input or Output Voltage	-0.5 to +5.5V(see Note 1)	V
Tstg	Storage Temperature	-55, +125

STLC5466 Features

64 TX HDLCs with broadcasting capability and/or CSMA/CR function with automatic restart in case of Tx frame abort
64 RX HDLCs including Address Recognition
16 Command/Indicate Channels (4 or 6-bit primitive)
16 Monitor Channels processed in accordance with GCI or V*
256 x 256 Switching Matrix without blocking and with Time Slot Sequence Integrity and loopback per bidirectional connection
DMA Controller for 64 Tx Channels and 64 Rx Channels
HDLCs AND DMA CONTROLLER ARE CAPABLE OF HANDLING A MIX OF LAPD,LAPB, SS7, CAS AND PROPRIETARY SIGNALLINGS
External shared memory access between DMA Controller and Micro processor
SINGLE MEMORY SHARED BETWEEN
x MULTI-HDLCs AND SINGLE MICRO PROCESSOR ALLOWS TO HANDLE n x 64 CHANNELS
Bus Arbitration
Interface for various 8,16 or 32 bit Microprocessors with fetch memory to accelerate the exchanges between Microprocessor and SHARED MEMORY
SDRAM Controller allows to inter face up to 16 Megabytes of Synchronous Dynamic RAM
Interrupt Controller to store automatically events in shared memory
Boundary scan for test facility
TQFP176 package 24 x 24 x 1.40 #MS-026BGA
HCMOS6; 0.35 micron; 3.3volts +/-5%
Operating temperature: -40 to +85 °/C

STLC5466 Connection Diagram

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