LOW_INPUT_CAPACITANCE_BUFFER

Published:2009/7/9 20:37:00 Author:May | From:SeekIC

Q1 and Q2 constitute a simple, high-speed FET input buffer. Q1 functions as a source follower, with the Q2 current-source load setting the drain-source channel current. The LT1010 buffer provides output drive capability for cables or whatever load is required. The LTC1052 stabilizes the circuit by comparing the filtered circuit output to a similarly filtered version of the input signal. The amplified difference between these signals is used to set Q2's bias, and hence Q1's channel current. This forces Q1's VGS to whatever voltage is required to match the circuit's input and output potentials. The diode in Q1's source line ensures that the gate never forward biases and the 2000-pF capacitor at A1 provides stable loop compensation. The rc network in A1's output prevents it from seeing high-speed edges coupled through Q2's collector-base junction. A2's output is also fed back to the shield around Q1's gate lead, bootstrapping the circuit's effective input capacitance to less than 1 pF.



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