The edge detection circuit using NAND gate

Published:2011/8/8 0:17:00 Author:Sophia | Keyword: edge detection circuit, NAND gate | From:SeekIC

This circuit is the rising edge detection circuit using the NAND gate previously described, and circuit edge of the output pulse amplitude as T ≈ RC, IC threshold voltage CMOS, T ≈ 0.7RC. In this circuit, when the input is L , the terminal voltage charge of capacitor C is voltage yDD and becomes high level H . When the input is H , before the C terminal voltage reaches y (T = RC), the output level is L . The figure is the input and output waveform of the edge detection circuit. 10pμs negative pulse will be got since the input begins to rise.



Reprinted Url Of This Article:
http://www.seekic.com/circuit_diagram/Amplifier_Circuit/The_edge_detection_circuit_using_NAND_gate.html

Print this Page | Comments | Reading(3)