200_ns_sample_hold

Published:2009/7/25 0:07:00 Author:Jessie | From:SeekIC

This circuit features an acquisition time of less than 200 ns, a common-mode input range of±3 V, drop of 1μV/pts, hold step of 2 mV, hold settling time of 15 ns, and feedthrough rejection much greater than 100 dB. To calibrate, ground the input, repetitively pulse the sample/hold command line, and adjust the 1-kO pot for 0-V output.



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