FREQUENCY_MULTIPLIER_WITHOUT_PLL

Published:2009/6/17 1:53:00 Author:May | From:SeekIC

An input rectangular signal is differentiated and short impulses are formed from its edges. These impulses write the content of counter A to a latch that clears the counter after a very short time. Counter A counts impulses of the frequency fo that are much greater than that of the input signal. The pulses come from an impulse generator. Thus, the number, which is written to the latch, expresses the number of these intpulses between the edges of the input signal. The impulses from the same generator pass to (reverse) counter B. The carry impulse loads the content of the latch to counter B. The latch is connected with the reverse counter such that the number written to this counter is 2M times smaller than the number introduced to the latch. This can be readily achieved by omitting M most significant bites of counter B. Because the number loaded to counter B is 2M times smaller than the number in the latch, the carry impulses of counter B have frequency 2M times greater than the frequendy of the impulses at the output of the differentiator. The cany impulses are fed to a D flip-flop, which divides their frequency by two. In this way, the output frequency is 2M greater than input frequency fo as long as the frequency of impulse generator fg is much greater than 2Mfo.



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