BOUNCELESS_MAKE_BREAK

Published:2009/6/29 4:00:00 Author:May | From:SeekIC

Circuit eliminates switch bounce problems during closing as well as opening. When switch is closed, Q output of flip-flop goes to logic 1 for delay period determined by RC time constant. Releasing switch operates NAND gate, making its output go to logic 1. This charges C through R until reset level is reached. Flip-flop then resets, changing Q output to logic 0. Values for R and C are chosen according to bounce duration of switch used. Fortypical 1-ASPST switch, 10,000 ohms and 0.41 μF were used.—L. F, Walsh and T. W. Hill, Make-and-Break Bounceless Switching, EDN|EEE Magazine, July 15, 1971, p 49.



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