CMOS_COMPATIBLE_SUCCESSIVE_APPROXI_MATION

Published:2009/6/30 1:51:00 Author:May | From:SeekIC

Converts analog inputto 8-bit digital output by using MC14559 CMOS successive-approximation registerwith Precision Monolithics DAC-100 D/A converter and CMP-01 comparator. Conversion sequence is initiated by applying positive pulse, with width greaterthan one clock cycle, to START CONVERSION input. Analog input is then compared successively to 1/2 scale, 1/4 scale, and remaining binarily decreasing bit weights until it has been resolved within 1/2 LSB. END OF CONVERSION then changes to logic 1 and parallel answer is present in negative-true binary-coded format at register outputs.—D. Soderquist, Interfacing Precision Monolithics Digital-to-Analog Converters with CMOS Logic, Precision Monolithics, Santa Clara, CA, 1975, AN-14, p 4.



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