GENERATE_ACCURATE_PWM_SIGNALS

Published:2009/6/24 22:21:00 Author:May | From:SeekIC

Accurate 10 to 90% duty-cycle PWM signals can be generated using this simple circuit setup.The desired duty cycle is selected by a single jumper block. PWM clock IC1 runs at 10x the desired pulse drive frequency. IC2, a 4017 divide-by-10 counter, decodes the clock pulses into one of 10 out-puts. Output 0 resets IC3, the PWM latch. The latch stays reset until the desired duty-cycle output set by the jumper block is reached. At this point, the PWM Iatch is set, and the PWM output line re-mains high until output 0 is decoded again.By calling IC2's output (0) the reset line for the latch, the PWM output is forced inactive if the jumper strap is rernoved to change duty cycles without first powering down.Using the zero-state reset allows IC2's reset pin to be used as an on/off control line for the cir-cuit. The complementary PWM output could be used in a full bridge design.



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