LATCH_MEMORY

Published:2009/7/3 4:18:00 Author:May | From:SeekIC

Use of saturable transformers makes memory nonvolatile and immune to false command signals. Transformers stay magnetically biased without voltage supply to provide reference state to which memory latch retumswhen power is reapplied. When bit is initially stored in circuit, set or reset pulse must have minimum width of 35 μs and minimum separation of 65 μs.-G. E. Bloom, Saturable Core Transformers Harden Latch Memories, Electronics, March 31, 1977, p 104-105.



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