REMOTE_DIGITAL_PROGRAMMING_OF_TIMER

Published:2009/7/13 2:16:00 Author:May | From:SeekIC

Either binary or BCD logic can be used for selecting delay interval of monostable timer A1, with delays being integral multiples of shortest time. Timing is programmed by pair of 4016 CMOS analog switches, A2 and A3. Given timing tap is activated when corresponding digital input control line is high and deactivated when control is low. Programmable timing range is 1 to 255 ms for 2240, and 1 to 99 ms for 2250 or 8250 timer. Basic interval can bechanged to suit other applications. CMOS output buffer stage ensures valid output logic Ievels. Although circuit will operate over supply range indicated, operation is optimum forsupply of 10 to 15V.-W. G. Jung, Take a Fresh Look at New IC Timer Applications, EDN Magazine, March 20, 1977, p 127-135.



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