Microprocessor_interface_for_free_running_A_D

Published:2009/7/23 22:39:00 Author:Jessie | From:SeekIC

This circuit provides for asynchronous reads of analog data to an 8-bit microprocessor. The CD4024BC ripple counter generates a READY signal to the microprocessor that prevents a READ during a data update. The output data latches are updated one A/D-clock period before the INTR falls low, and the free-running conversion time is always 72 clock periods long. To start the A/D converter, a logic low must be applied to the SYSTEM RESET. The timing diagram shows relationships of the INTR, READY, and RDsignals.



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