Binary Synchronous Counter Circuit of 74HC161

Published:2011/7/25 10:24:00 Author:Michel | Keyword: Binary, Counter Circuit | From:SeekIC

Picture 1 is binary synchronous counter circuit of 74HC161.It needs the counter which issynchronous with clock to get the real time counting result.When the highest clock frequency is input,the gate circuit is used,the front level (74HC161(1))RCO input is added to ENP of the last level (74 HCl61 (4).Therefore, the signal delay is determined by gate and it has nothing to do with counter so that the clock frequency is increased.In the circuit, the CLR, LD, CLK ENB are extra signals.When the CLR is low PWL,Qo一Q15 outputs low PWL.When ENB is high PWL,CLK rising edge is counting. Picture 1:Binary Synchronous Counter Circuit of 74HC161



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