RESET_MODE

Published:2009/7/12 21:41:00 Author:May | From:SeekIC

RCA CA555 timer is connected so CT is initiallyheld in discharged stata bytransistor in IC. When start switch is closed, internal flip-flop clears short across CT, driving output voltage high and energizing relay. Voltage across capacitor then increases exponentially with time constant R1CT. When capacitor voltage equals two-thirds of V+, flip-flop resets and discharges capacitor rapidly, driving output low and releasing relay. Timing interval is relatively independent of supply voltage variations. Applying negative pulse simultaneously to reset pin 4 and trigger pin 2 by closing both switches during timing cycle causes timing cycle to restart. Momentary closing of reset switch only serves to discharge CT without restarting timer. - Linear Integrated Circuits and MOS/ FET's, RCA Solid State Division, Somerville, NJ, 19-l7, p 56.



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