Comparator_logic_level_translator_TTL_to_CMOS

Published:2009/7/24 4:52:00 Author:Jessie | From:SeekIC

Fig. 15-32 This circuit shows two sections of an HA-4900 used as a TTL to CMOS interface. Additional sections can be added. Negative logic devices may also be interfaced with appropriate supply connections, If separate supplies are used for V- and YLOGIC-, this circuit will tolerate several volts of ground-line differential noise. Figures 15-32B and 15-32C show the pin connections, and electrical characteristics, respectively. Harris Semiconductor Linear & Telecom ICs, 1991 p, 4-24 4-25, 4-29.



Reprinted Url Of This Article:
http://www.seekic.com/circuit_diagram/Electrical_Equipment_Circuit/Comparator_logic_level_translator_TTL_to_CMOS.html

Print this Page | Comments | Reading(3)