DARKROOM_EXPOSURE_TIMER

Published:2009/7/24 3:02:00 Author:Jessie | From:SeekIC

In this circuit, op-amp IC1b and timer IC2 form a voltage-controlled oscillator circuit with its frequency varied by the dual-ganged potentiometer (VR1). Resistor R3 effectively swamps any variations in VR1 value, preventing them from altering the lowest control voltage, as set by R4 and R5. The values of these resistors are chosen to give a ratio between the highest and lowest volt-ages of 32.5:1, which sets the timing range from 0.4 to 13 minutes, ensuring cover of the intended range of 0.5 to 12 minutes. Opamp IC1b is used as a comparator. Capacitor C1 charges in exponential fashion from VR2 and R6 until the voltage across it reaches the selected control voltage from VR1b. When it does so, the output of IC1b goes low, triggering timer IC2, which then delivers a 2.5-ms pulse from output pin 3. This is used to discharge C1 via transistor TR1. VR2 provides the overall trimming adjustment for calibration. From IC2, the output pulses are applied through resistor R10 to the CLOCK input of binary counter IC3. This counts the pulses until the selected output goes high, blocking the CLOCK signal via diode D1. Pin 15 of IC3 is the 11th counter output, so 1024 clock pulses are counted. The final output of the circuit is controlled by quad NOR gate IC4. When the cir-cult is first energized, a positive pulse from C5 via D2 to IC4a pin 1 causes IC4a output pin 3 to go low and IC4b output pin 4 to go high, the OFF state. The high output of IC4b pin 4 charges C4 through R13. When START switch S1 is pressed, output pin 3 goes high, the ON state. At the same time, the pulse resets counter IC3 via its input, pin 11. Capacitor C4 will not be recharged until the output re-turns to the OFF state, ensuring that if switch S1 is held down or accidentally pressed again before timing is complete, the output time will not be affected. Timing ceases when the link-selected output of IC3 goes high and resets IC4a through R14.



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