The circuit of a watchdog

Published:2011/6/27 22:47:00 Author:Borg | Keyword: watchdog | From:SeekIC

See as the above figure: when the circuit is working, just send CD4060 the reset pulse timely, the Q1 will be blocked, so the NMOS pipe under control is conducting and provides with power for the processor circuit. The virtue of the circuit is that the timing-span is long, which can be several minutes, so it can offer enough time to the systems whose reset time is long. With the pulse feeding the watchdog, when the power is getting through, the counter is offered with a reset pulse by R2, C1 and R3, so Vout is made sure to have output.



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