The open-state level test circuit diagram indicated by lighting Dp decimal point

Published:2011/7/20 20:16:00 Author:Ecco | Keyword: open-state, level test , indicated , lighting, Dp decimal point | From:SeekIC

The open-state level test circuit diagram indicated by lighting Dp decimal point is shown as the chart. VT is conducted when it is in high level, it indicates H; VT is cut off when it is in low level, pin 1 of 7402 is in high level, it indicates L; when probe opens the circuit, pin 2,3 of 7402 are input high level, pin 1 outputs low level. At the same time, VT cuts off, pin 5 is pulled down in low level by R4, only pin 4 outputs high level to drive dp decimal point to emit.



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