High power regulator inverter circuit diagrams

Published:2014/3/17 21:22:00 Author:lynne | Keyword: High power regulator inverter circuit diagrams, TL494, 2SK906, 2SK564 | From:SeekIC

The use of the composition of 400W power regulator TL494 inverter circuit. It excited transform part is TL494, VT1, VT2, VD3, VD4 constitutes a sink current drive circuit, driving two of each two 60V/30A MOS FET switch. For increasing the output power of each channel can be three to four switches in parallel applications, the circuit unchanged. The inverter TL494 application as follows: 1,2 feet constituted regulator sampling error amplification system, a positive input pin input sampling secondary winding rectifier inverter output 15V DC voltage, the R1, R2 partial pressure, so that the first leg of the inverter Nearly 4.7 ~ 5.6V voltage sampling work. Inverting input pin 2 Input 5V reference voltage (from 14 feet out). When the output voltage is reduced, a lower pin voltage error amplifier output low, the PWM circuit output voltage increases. When a voltage is normal foot 5.4V, 2-pin voltage is 5V, 3-pin voltage is 0.06V. Then the output AC voltage is 235V (square-wave voltage). 4-pin external R6, R4, C2 set the dead time. Normal voltage is 0.01V. 5,6 pin external CT, RT triangle wave oscillator frequency is set to 100Hz. 5 pin voltage is normal 1.75V, 6-pin voltage is 3.73V. 7 feet for common ground. 8, 11 feet inside the drive output transistor collector, 12 feet for the TL494 pre-supply terminal, this three-terminal controlled by a switch S TL494 start / stop, as the inverter control switch. When S1 is turned off, TL494 no output pulse, so the switch VT4 ~ VT6 no current. When S1 is turned on, this tripod is the battery voltage is positive voltage. 9,10 feet inside the driver stage transistor emitter output two different positive pulse timing. Normal voltage is 1.8V. The first 13, 14 feet 14 feet 5V reference voltage output, so that there is 5V 13 feet high, the control gates, flip-flop output two drive pulses, for push-pull switching circuits. The first 15-pin external 5V voltage, constitute the reference voltage error amplifier inverting input to the non-inverting input terminal 16 feet high protection constitute input. In this connection, when the input is greater than 16 feet high of 5V, the output voltage can be reduced through the role of regulator, on or off the drive pulses to achieve protection. In its excited inverter output is almost no possibility of overpressure, so the circuit is not used in the first 16 feet, the ground by a resistor R8. The capacity of 400VA inverter with power frequency transformer cores using 45 × 60mm2 silicon steel. The primary winding of wire with a diameter of 1.2mm, two and around 2 × 20 turns. Secondary sampling using 0.41mm wire winding around the 36-turn, center tap. 230V secondary winding is calculated by using the 0.8mm enameled wire wound 400 turns. Switch VT4 ~ VT6 available 60V/30A any type of N-channel MOS FET tube instead. VD7 available 1N400X series ordinary diodes. The circuit is almost without debugging to work properly. When C9 positive terminal voltage is 12V, R1 can be between 3.6 ~ 4.7kΩ choice, or 10kΩ potentiometer is adjusted so that the output voltage rating. If this is the inverter output power increases almost 600W, the primary current in order to avoid excessive increase of the resistive losses, should the battery switch to 24V, VDS can be used to switch high current MOS FET 100V tube. It should be noted that the choice of multi-tube rather parallel, rather than choose single IDS greater than 50A of the switch, the reason is: a higher price, two driving too difficult. Suggested the use of 100V/32A of 2SK564, 2SK906 or optional three parallel applications. Meanwhile, the transformer core cross section required to achieve 50cm2, calculated by the ordinary power transformer turns and calculated diameter, or the use of alternative waste transformer UPS-600. Such as refrigerators, electric fans powered, do not forget to join LC low-pass filter. Power regulator inverter circuit shown in Figure: >



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