LOGIC_TESTER

Published:2009/7/16 21:39:00 Author:Jessie | From:SeekIC

The input consists of two comparators that operate with different reference voltages supplied by separate potential dividers. Divider R3/R4/R5 provides a voltage of about 40% of the supply voltage, UCC, to pin 6 of IC1B and one of about 16% of UCC to pin 3 of UC1A. When UCC = 5 V, these voltages are exactly the thresholds (0.8 and 2.0 V) of the TTL comparators. Similarly, divider R6/R7/R8 provides voltages of 23% of UCC and 73% of UCC to pin 3 of IC1A and pin 6 of IC1B respectively; these levels correspond to the standard threshold for CMOS comparators. The voltage to be measured Ua, is applied to pin 5 of IC1B and pin 2 of IC1A and compared with the respective reference. The output of comparator IC1B goes high when Ua, exceeds the reference, whereas the output of IC1A goes high when Ua lies below the voltage at pin 3. The comparators are followed by driver stages, T1 and T2, for the LED display (D1 for high and D2 for low ) and also NOR gate IC2A that switches on T3 when the output of both comparators is low, that is, when it is undefined. This state is indicated by D3. The remaining three gates in IC2 form a monostable. During quiescent operation, UCC is present at the input of inverter IC2C. The output of the inverter is then low, T4 is off and D4 is out. Pin 4 of IC2B is also high, but this state changes when a pulse arrives at pin 5. The output of IC2B then goes low, C2 discharges, the inverter toggles, T4 is switched on, and D4 lights. This state is unstable, however, because C2 recharges via R13, Although the pulse at pin 5 might be very short, the time constant R13/C2 lengthens it to about 100 ms. The supply voltage can lie between 5 and 15 V. At 5 V, the circuit draws a current of about 15 mA. The input impedance of the tester is of the order of 330 kΩ.



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