The long-span timing circuit

Published:2011/6/24 21:32:00 Author:qqtang | Keyword: long-span, timing | From:SeekIC

In the circuit is the long-span timing circuit. In the circuit, A1 is a FET input op-amp TL082, the voltage on the non-inverting is half of the saturating voltage(about 12V), and the voltage of the inverting terminal is fixed at +.0.6V due to the conduction of VD1. If the triggering terminal is input with a higher than 6V passive pulse, A1 is in passive saturation, at the moment, the non-inverting terminal is in a -6V voltage, the capacitor C1 is charging back with the help of R1, is the charging voltage is over -0.6, A1 output is in positive saturation, then a period is over. The charging time is T＝R1C1ln（R2＋R3）／R3.



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