256_LEVEL_HOLD

Published:2009/7/20 21:32:00 Author:Jessie | From:SeekIC

Uses digital approximation to hold sampled analog voltage for long periods. Cascaded SN7493 ICs form 8-bit binary counter providing 256 discrete voltage levels from opamp A2, while input voltage provides varying reference to opamp A1 serving as comparator. Apply0 at reset input to clear counter for period determined by monostable IC. Counter now feeds staircase waveform to A1 through A2 until staircase reaches Vin, when counter goes high and disables counter clock. Count is then held and sampled voltage appears at output.-N. Macdonald, Digital Sample and Hold, Wireless World, May 1976, p 78.



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