Improved one-shot timer circuit composed of 2 PUT

Published:2011/5/8 11:11:00 Author:Rebekka | Keyword: Improved one-shot timer | From:SeekIC

Figure 1 is an improved trigger timing circuit composed of 2 PUT. If you add the set signal, the circuit will be set, transistor VT1 turn to the conduction state, the relay K will be energized action. It supplies voltage for the delay voltage at the same time. Therefore, the capacitor is charged by C1. PUT1 is conducted by positive voltage. C1 passes PUT1, R2, and VD2 discharges. VD2 turn to positive voltage and stops the anode - gate of positive PUT. The circuit resets. R2 is used to limit the discharge current of C1, and extend the time of anti-bias gate of anode PUT. Because the circuit uses a reverse bias reset signal and the signal is not added to the PUT2 anode - cathode. The mutation voltage has no effect to load circuit. Follow the device parameters shown in the figure. The single-trigger time is about 5s, adjust the value of resistance R1 can change the regular time.



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