42252

SpecificationsSupply Voltage.............................................................. 7VInput Voltage ................................................................7VOperating Free Air Temperature Range.... 0°C to +70°CStorage Temperature Range ...............-65°C to +150°CNote 2: The Abs...

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42252 Picture
SeekIC No. : 004230637 Detail

42252: SpecificationsSupply Voltage.............................................................. 7VInput Voltage ................................................................7VOperating Free Air Temper...

floor Price/Ceiling Price

Part Number:
42252
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/25

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Product Details

Description



Specifications

Supply Voltage.............................................................. 7V
Input Voltage ................................................................7V
Operating Free Air Temperature Range.... 0°C to +70°C
Storage Temperature Range ...............-65°C to +150°C
Note 2: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.




Description

This 42252 contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering of 42252 occurs at a voltage level and is not directly related to the transition time of the falling edge of the clock pulse. Data on the J and K inputs may be changed while the clock is HIGH or LOW without affecting the outputs as long as the setup and hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.




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