54FCT373 General Description
The 'FCT373 consists of eight latches with TRI-STATE out- putsforbusorganizedsystemapplications.Theflip-flopsap-
pear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times
is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in the high impedance state.
54FCT373 Maximum Ratings
Storage Temperature ...................................................-65 to +150
Ambient Temperature under Bias................................. -55 to +125
Junction Temperature under Bias
Ceramic ....................................................................-55 to +175
VCC Pin Potential to
Ground Pin .................................................................-0.5V to +7.0V
Input Voltage (Note 2) ...................................................-0.5V to +7.0V
Input Current (Note 2) .............................................-30 mA to +5.0 mA
Voltage Applied to Any Output
in the Disabled or
Power-Off State .......................................................-0.5V to +4.75V
in the HIGH State .........................................................-0.5V to V CC
Current Applied to Output
in LOW State (Max) ....................................Twice the rated IOL (mA)
54FCT373 Features
TRI-STATE outputs for bus interfacing
TTL input and output level compatible
CMOS power consumption
Output sink capability of 32 mA, source capability of 12 mA
Standard Microcircuit Drawing (SMD) 5962-8764401
54FCT373 Connection Diagram
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