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74AUP1G386

Features: Wide supply voltage range from 0.8 V to 3.6 V High noise immunityComplies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114E Class 3A exceeds 5000 V MM JE...

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SeekIC No. : 004249534 Detail

74AUP1G386: Features: Wide supply voltage range from 0.8 V to 3.6 V High noise immunityComplies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8...

74AUP1G386 Data Sheet

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Part Number:
74AUP1G386
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114E Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101-C exceeds 1000 V
Low static power consumption; ICC = 0.9 mA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial Power-down mode operation
Multiple package options
 Specified from -40 °C to +85 °C and -40 °C to +125 °C


Pinout

Connection Diagram


Specifications

Symbol Parameter Conditions
Min
Max
Unit
VCC supply voltage  
-0.5
+4.6
V
IIK input clamping current VI < 0 V
-
-50
mA
VI input voltage  
-0.5
+4.6
V
IOK output clamping current VO > VCC or VO < 0 V
-
±50
mA
VO output voltage Active mode
-0.5
VCC + 0.5
V
Power-down mode
-0.5
+4.6
V
IO output current VO = 0 V to VCC
-
±20
mA
ICC supply current  
-
+50
mA
IGND ground current  
-
-50
mA
Tstg storage temperature  
-65
+150
Ptot total power dissipation Tamb = -40 to +125
-
250
mW



Description

The 74AUP1G386 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

The 74AUP1G386 ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

The 74AUP1G386 is fully specified for partial power-down applications using IOFF.

The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

The 74AUP1G386 provides a single 3-input EXCLUSIVE-OR gate.




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