AD6458

Features:

Fully Compliant with Standard and Enhanced GSM
    Specification
        -12 dBm Input 1 dB Compression Poin
        -2 dBm Input Third Order Intercep
       10 dB SSB Noise Figure (330 )
    DC(R)C400 MHz RF and LO Bandwidth
Linear IF Amplifier
    Linear-in-dB and Stable over Temperature Voltage
Gain Control
Quadrature Demodulator
   Onboard Phase-Locked Quadrature Oscillator
   Demodulates IFs from 5 MHz to 50 MHz
Low Power
   9 mA at Midgain
   1 A Sleep Mode Operation
   3.0 V to 3.6 V Operation
Interfaces to AD7013, AD7015 and AD6421 Baseband Converters
20-Lead SSOP

Pinout




Specifications

Supply Voltage VPS1, VPS2 to COM1, COM2 . . . . ........ +3.6 V
Internal Power Dissipation² . . . . . . . . . . . . . . . . . . . . 600 mW
Operating Temperature Range . . . . . . . . . . ....-40 to +85
Storage Temperature Range . . . . . . . . . . . . .-65 to +150
Lead Temperature, Soldering (60 sec) . . . . . . . . . . . ...+300

Description

The AD6458 is a 3 V, low power receiver IF subsystem for operation at input frequencies as high as 400 MHz and IFs from 5 MHz up to 50 MHz. It is optimized for operation in GSM, DCS1800 and PCS1900 receivers. It consists of a mixer, IF amplifier, I and Q demodulators, a phase-locked quadrature oscillator, precise AGC subsystem, and a biasing system with external power-down.

The low noise, high intercept mixer of the AD6458 is a doubly-balanced Gilbert cell type. It has a nominal (R)C12 dB
input-referred 1 dB compression point and a (R)C2 dBm input referred third-order intercept. The mixer section of the AD6458 also includes a local oscillator (LO) preamplifier, which lowers the required LO drive to (R)C16 dBm

The gain control input accepts an external gain-control voltage input from an external AGC detector or a DAC. It provides an 80 dB gain range with 27 mV/dB gain scaling.

The I and Q demodulators provide inphase and quadrature baseband outputs to interface with Analog Devices°O AD701 (IS54, TETRA, MSAT) and AD7015 and AD6421 (GSM, DCS1800, PCS1900) baseband converters. An onboard quadrature VCO which is externally phase-locked to the IF signal drives the I and Q demodulators. This locked reference signal is normally provided by an external VCTCXO under the control of the radio°Os digital processor. The AD6458 can als provide demodulation of N-PSK and N-QAM in many non-TDMA systems when used with external analog carrier recovery systems such as the Costas Loop. Finally, the VCO can be phase-locked to a frequency which is deliberately offset from the IF, as in the case of a Beat-Frequency Oscillator (BFO), result-ing in the product detection of CW or SSB.

The AD6458 uses supply voltages from 3.0 V to 3.6 V over the temperature range of -40 to +85. Operation is enabled by a CMOS logical level; response time is typically <80 s. When disabled, the standby current is reduced to 1 A.

The AD6458 comes in a 20-lead shrink small outline (SSOP) surface-mount package.