MFG:AD Package Cooled:QFP D/C:06+
MFG: AD
Package Cooled: QFP
D/C: 06+
Description: The AD6472 is a single chip analog front end for two pair or single pair HDSL applications that use 11...
The AD6472 is a single chip analog front end for two pair or single pair HDSL applications that use 1168 Kbps or 2.32 Mbps data rates.
The AD6472 integrates all the transmit and receive functional blocks together with the timing recovery DAC.The digital interface is designed to support industry standard digital transceivers.
While providing the full analog front end for ETSI standards (two pair or single pair HDSL applications) the AD6472 supports other applications because the architecture allows for bypassing the functional blocks.
The normal, low power, and loopback modes and the digital interface combine to make the AD6472 simple to integrate into systems.
AD6472
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